ESD 4.10 display instabilities

FTDI/Bridgetek EVE2 & EVE3 & EVE4 SPI TFT Series by Matrix Orbital

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Cyrilou
LCD?
Posts: 3
Joined: Wed Feb 17, 2021 2:09 am

ESD 4.10 display instabilities

Post by Cyrilou »

Hi,

I 've made a screen with ontly 3 labels rendered in the normal loop of ESD4.10 exported eclipse project on a renesas synergy MCU with EVE3-43A-BLM-TPN board.
I've enabled _DEBUG preprocessor.
It can display 10 minutes without errors and suddenly
I encounter many display glitches and hanging randomly:
- "illegal option in cmd_text"
- bad characters
- screen becomes black but program runs normally in background and i'm unable to unlock it since there is no error detected. I must unplug power to unlock it.

When screen is black (or white, it depends) coprocessor fifo space is not released, it makes a resetcoprocessor, after cmdb_space =4092, I make 2 writes and cmdb_space=4084 but is not released and so on!
I think coprocessor is locked. How to unlock it without switch off/on power?
Modify SPI bitrate changes nothing.

Recovery procedure are already handled by ESD exclipse export. The main problem here is that coprocessor fifo is in an instable state even if we use recovery procedure or reset the chip (powercycle function) without unplug power. Do you think we must add serial and pull up resistors to adapt impedance of SPI bus lines like in Ft800 datasheet suggest?

I think there is a case where we can lock FIFO memory and today there is no way to unlock it even in datasheet.

Other problem

3V3 power signal is bad (see attachment) with 10cm ribbon. With 5cm it is better and spi communication problems are decreasing.
If we shortcut R9 and R10, this artifacts disappear.
3v3 5cm
3v3 5cm
IMG_20210217_104631.jpg (862.71 KiB) Viewed 1313 times
3v3 10cm
3v3 10cm
IMG_20210217_104217.jpg (819.28 KiB) Viewed 1313 times

Rudolph
LCD Guru
Posts: 67
Joined: Wed Feb 28, 2018 11:09 am

Re: ESD 4.10 display instabilities

Post by Rudolph »

Can you share what the schematic of your board and the pcb itself looks like for the display interface?

I am using an EVE3-43G in one project and it just works completely stable.

When I am trying out Arduinos, like UNO, MetroM4, ESP32 and whatnot I am using one of these:
https://github.com/RudolphRiedel/EVE_di ... 5019-01-05

So I am not even connecting pin 15 and pin 16 and I am using a non-mirrored connecter for use with a FFC cable
with connections on opposite sides since I sandwich the board in the display in my case for it.
Okay, I usually use a 5cm FFC cable but with these I maxed out the SPI clock at 40MHz when using an EVE3-50G.
That was display only though, correctly reading from the display "only" worked up to 17MHz.

My current project with the EVE3-43G is using a specialized board though for that purpose only, the display interface looks like this:
EVE_ffc_pcb.jpg
EVE_ffc_pcb.jpg (36.98 KiB) Viewed 1300 times
EVE_ffc.jpg
EVE_ffc.jpg (89.08 KiB) Viewed 1300 times
I can populate the board with either an ATSAMC21J18A or an ATSAME51J19A.
The 3.3V are generated by a step-down converter and the whole thing currently draws 54mA at 13V from my bench PSU with the
backlight down to 0x20.
The SPI clock is 12MHz for the C21 and 15MHz for the E51.

Annother unit for a different project is in use by co-workers and is runing a 7" display with an E51.
They are currently using it several hours per day without issues.

One question might be, whats up with the glue-logic?
The signals are named like this is for level-shifting but this is just a lazy copy/paste job, the controllers are running on 3.3V.
When I tried out the first prototype that was running the C21 at 3.3V like this it did not work at the SPI clock I was used
to use when running the C21 at 5V.
It turned out that the outputs of the C21 are too weak to drive the SPI lines for the display at the desired speeds.
I even confirmed this by using two pins for SCK and MOSI each in parallel.

Okay, I am not using ESD, I am using my own code library to drive EVE crazy: https://github.com/RudolphRiedel/FT800-FT813
While it is multi platform Renesas Synergy never really crossed my path so far.
I looked it up and these are just not the right Renesas products for what I usually do. :-)

Cyrilou
LCD?
Posts: 3
Joined: Wed Feb 17, 2021 2:09 am

Re: ESD 4.10 display instabilities

Post by Cyrilou »

Hello,

Thanks for this complete answer! I've already seen your open source project. I've ported synergy source code to ESD. I don't know your procedure to design screens but with ESD I can see the differents screens and render before I send it to the MCU. I think it's easier and faster than code and flash each time and see the render.
I think you must use EVE screen editor on your side.
Your lib is adapted to make one simple screen but when you have a complete application with several pages, animations and menus it begins to become a little bit tricky.

For the hardware, you're using 10 ohms series resistors and capacitances for spi lines and between 3v3 and gnd. We have nothing of that:
matrix.PNG
matrix.PNG (75.78 KiB) Viewed 1290 times
If we unmount r100 et r103 signal is the worst and lot of glitches.

Rudolph
LCD Guru
Posts: 67
Joined: Wed Feb 28, 2018 11:09 am

Re: ESD 4.10 display instabilities

Post by Rudolph »

I worked on the 7" with the E51 for almost all the day today and it never glitched.
I was not 100% sure but as I had to take it apart to populate the second CAN channel on my PCB,
I checked and it is using an EVE2-70G.

I am not using EVE Screen Editor as well, I write my GUIs in the editor, mostly.
Well, I am in prototyping, I design functional gadgets to assist in the development of other projects.
I do not design GUIs for end customer parts like coffee machines.

I kind of hoped that EVE Screen Editor would be upgraded to export code for the BRT AN 025 library as this
is pretty close to my own library.
But this did not happen yet.
This would at least makes things a little easier with positioning things.

But this is not the actual topic. :-)

Your schematic looks a bit empty. :-)
It is well possible that I have a few parts that are not needed though. :-)
A stable supply is important and I usually aim rather a little higher than 3.3V as lower, 3.35V rather than 3.29V.

I just downloaded and checked a bunch of Renesas Synergy datasheets, S5D3, S1JA and S128.
The drive strength is rather weak on those as well, depending on the pins and functions.
Have you tried configuring the pins for "Middle drive" or even "High drive" if the pins used allow for that?

And while you wrote "Modify SPI bitrate changes nothing".
Which clock rates are you trying to use?
Does it really not help to go down to 1MHz or even lower?

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